# This file is generated by the script SetUpCtestFiles.py
# If possible, modify the script to fix any issues with the CMakeLists.txt files
# Or you can remove this header line to prevent this file from being overwritten

file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/ramp_test1.cir ${CMAKE_CURRENT_BINARY_DIR}/ramp_test1.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/ramp_test1.cir.gs.pl ${CMAKE_CURRENT_BINARY_DIR}/ramp_test1.cir.gs.pl ONLY_IF_DIFFERENT)
file(CHMOD ${CMAKE_CURRENT_BINARY_DIR}/ramp_test1.cir.gs.pl PERMISSIONS OWNER_READ OWNER_WRITE OWNER_EXECUTE GROUP_READ GROUP_EXECUTE WORLD_READ WORLD_EXECUTE)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/ramp_test1.cir.sh ${CMAKE_CURRENT_BINARY_DIR}/ramp_test1.cir.sh ONLY_IF_DIFFERENT)
file(CHMOD ${CMAKE_CURRENT_BINARY_DIR}/ramp_test1.cir.sh PERMISSIONS OWNER_READ OWNER_WRITE OWNER_EXECUTE GROUP_READ GROUP_EXECUTE WORLD_READ WORLD_EXECUTE)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/tags ${CMAKE_CURRENT_BINARY_DIR}/tags ONLY_IF_DIFFERENT)
if( (NOT Xyce_PARALLEL_MPI) AND BASH_FOUND )
  add_test(NAME ${TestNamePrefix}TIA/TRAP/BJT/ramp_test1.cir.sh COMMAND bash ramp_test1.cir.sh $<TARGET_FILE:Xyce> ${XYCE_VERIFY} ${XYCE_VERIFY} ramp_test1.cir ${OutputDataDir}/TIA/TRAP/BJT/ramp_test1.cir.prn )
  set_property(TEST ${TestNamePrefix}TIA/TRAP/BJT/ramp_test1.cir.sh PROPERTY LABELS "analytic;serial")
endif()
