# This file is generated by the script SetUpCtestFiles.py
# If possible, modify the script to fix any issues with the CMakeLists.txt files
# Or you can remove this header line to prevent this file from being overwritten

file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/resistor.cir ${CMAKE_CURRENT_BINARY_DIR}/resistor.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/resistor.cir.prn.gs.pl ${CMAKE_CURRENT_BINARY_DIR}/resistor.cir.prn.gs.pl ONLY_IF_DIFFERENT)
file(CHMOD ${CMAKE_CURRENT_BINARY_DIR}/resistor.cir.prn.gs.pl PERMISSIONS OWNER_READ OWNER_WRITE OWNER_EXECUTE GROUP_READ GROUP_EXECUTE WORLD_READ WORLD_EXECUTE)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/resistor_lv3.cir ${CMAKE_CURRENT_BINARY_DIR}/resistor_lv3.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/resistor_lv3_2.cir ${CMAKE_CURRENT_BINARY_DIR}/resistor_lv3_2.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/resistor_neg.cir ${CMAKE_CURRENT_BINARY_DIR}/resistor_neg.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/tags ${CMAKE_CURRENT_BINARY_DIR}/tags ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/DefaultValueWarning.cir ${CMAKE_CURRENT_BINARY_DIR}/DefaultValueWarning.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/DefaultValueWarning.cir.sh ${CMAKE_CURRENT_BINARY_DIR}/DefaultValueWarning.cir.sh ONLY_IF_DIFFERENT)
file(CHMOD ${CMAKE_CURRENT_BINARY_DIR}/DefaultValueWarning.cir.sh PERMISSIONS OWNER_READ OWNER_WRITE OWNER_EXECUTE GROUP_READ GROUP_EXECUTE WORLD_READ WORLD_EXECUTE)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/DefaultValueWarning.cir.tags ${CMAKE_CURRENT_BINARY_DIR}/DefaultValueWarning.cir.tags ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/DefaultValueWarning.cir.options ${CMAKE_CURRENT_BINARY_DIR}/DefaultValueWarning.cir.options ONLY_IF_DIFFERENT)
if( (NOT Xyce_PARALLEL_MPI) AND PERL_FOUND )
  add_test(NAME ${TestNamePrefix}RESISTOR/DefaultValueWarning.cir.sh COMMAND perl -I${XyceRegressionTestScripts} DefaultValueWarning.cir.sh $<TARGET_FILE:Xyce> ${XYCE_VERIFY} ${XYCE_VERIFY} DefaultValueWarning.cir ${OutputDataDir}/RESISTOR/DefaultValueWarning.cir.prn )
  set_property(TEST ${TestNamePrefix}RESISTOR/DefaultValueWarning.cir.sh PROPERTY LABELS "serial;parallel;nightly;resistor;thermalresistor;semicresistor;errorexit")
endif()
if( Xyce_PARALLEL_MPI  AND PERL_FOUND )
  add_test(NAME ${TestNamePrefix}RESISTOR/DefaultValueWarning.cir.sh COMMAND perl -I${XyceRegressionTestScripts} DefaultValueWarning.cir.sh "mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce>" ${XYCE_VERIFY} ${XYCE_VERIFY} DefaultValueWarning.cir ${OutputDataDir}/RESISTOR/DefaultValueWarning.cir.prn )
  set_property(TEST ${TestNamePrefix}RESISTOR/DefaultValueWarning.cir.sh PROPERTY LABELS "serial;parallel;nightly;resistor;thermalresistor;semicresistor;errorexit")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}RESISTOR/resistor.cir COMMAND $<TARGET_FILE:Xyce> resistor.cir )
  set_property(TEST ${TestNamePrefix}RESISTOR/resistor.cir PROPERTY LABELS "serial;nightly;valgrind;resistor")
  set_tests_properties(${TestNamePrefix}RESISTOR/resistor.cir PROPERTIES FIXTURES_SETUP resistor.cir)
  add_test(NAME ${TestNamePrefix}RESISTOR/resistor.cir.gen_gs COMMAND perl resistor.cir.prn.gs.pl resistor.cir.prn)
  set_tests_properties(${TestNamePrefix}RESISTOR/resistor.cir.gen_gs PROPERTIES FIXTURES_REQUIRED resistor.cir)
set_tests_properties(${TestNamePrefix}RESISTOR/resistor.cir.gen_gs PROPERTIES FIXTURES_SETUP resistor.cir.gs)
  set_property(TEST ${TestNamePrefix}RESISTOR/resistor.cir.gen_gs PROPERTY LABELS "serial;nightly;valgrind;resistor")
  add_test(NAME ${TestNamePrefix}RESISTOR/resistor.cir.verify COMMAND ${XYCE_VERIFY} resistor.cir resistor.cir.prn.gs resistor.cir.prn )
  set_tests_properties(${TestNamePrefix}RESISTOR/resistor.cir.verify PROPERTIES FIXTURES_REQUIRED resistor.cir.gs)
  set_property(TEST ${TestNamePrefix}RESISTOR/resistor.cir.verify PROPERTY LABELS "serial;nightly;valgrind;resistor")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}RESISTOR/resistor_lv3.cir COMMAND $<TARGET_FILE:Xyce> resistor_lv3.cir )
  set_property(TEST ${TestNamePrefix}RESISTOR/resistor_lv3.cir PROPERTY LABELS "serial;nightly;valgrind;resistor")
  set_tests_properties(${TestNamePrefix}RESISTOR/resistor_lv3.cir PROPERTIES FIXTURES_SETUP resistor_lv3.cir)
  add_test(NAME ${TestNamePrefix}RESISTOR/resistor_lv3.cir.verify COMMAND ${XYCE_VERIFY} resistor_lv3.cir ${OutputDataDir}/RESISTOR/resistor_lv3.cir.prn resistor_lv3.cir.prn )
  set_tests_properties(${TestNamePrefix}RESISTOR/resistor_lv3.cir.verify PROPERTIES FIXTURES_REQUIRED resistor_lv3.cir)
  set_property(TEST ${TestNamePrefix}RESISTOR/resistor_lv3.cir.verify PROPERTY LABELS "serial;nightly;valgrind;resistor")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}RESISTOR/resistor_lv3_2.cir COMMAND $<TARGET_FILE:Xyce> resistor_lv3_2.cir )
  set_property(TEST ${TestNamePrefix}RESISTOR/resistor_lv3_2.cir PROPERTY LABELS "serial;nightly;valgrind;resistor")
  set_tests_properties(${TestNamePrefix}RESISTOR/resistor_lv3_2.cir PROPERTIES FIXTURES_SETUP resistor_lv3_2.cir)
  add_test(NAME ${TestNamePrefix}RESISTOR/resistor_lv3_2.cir.verify COMMAND ${XYCE_VERIFY} resistor_lv3_2.cir ${OutputDataDir}/RESISTOR/resistor_lv3_2.cir.prn resistor_lv3_2.cir.prn )
  set_tests_properties(${TestNamePrefix}RESISTOR/resistor_lv3_2.cir.verify PROPERTIES FIXTURES_REQUIRED resistor_lv3_2.cir)
  set_property(TEST ${TestNamePrefix}RESISTOR/resistor_lv3_2.cir.verify PROPERTY LABELS "serial;nightly;valgrind;resistor")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}RESISTOR/resistor_neg.cir COMMAND $<TARGET_FILE:Xyce> resistor_neg.cir )
  set_property(TEST ${TestNamePrefix}RESISTOR/resistor_neg.cir PROPERTY LABELS "serial;nightly;valgrind;resistor")
  set_tests_properties(${TestNamePrefix}RESISTOR/resistor_neg.cir PROPERTIES FIXTURES_SETUP resistor_neg.cir)
  add_test(NAME ${TestNamePrefix}RESISTOR/resistor_neg.cir.verify COMMAND ${XYCE_VERIFY} resistor_neg.cir ${OutputDataDir}/RESISTOR/resistor_neg.cir.prn resistor_neg.cir.prn )
  set_tests_properties(${TestNamePrefix}RESISTOR/resistor_neg.cir.verify PROPERTIES FIXTURES_REQUIRED resistor_neg.cir)
  set_property(TEST ${TestNamePrefix}RESISTOR/resistor_neg.cir.verify PROPERTY LABELS "serial;nightly;valgrind;resistor")
endif()
