# This file is generated by the script SetUpCtestFiles.py
# If possible, modify the script to fix any issues with the CMakeLists.txt files
# Or you can remove this header line to prevent this file from being overwritten

file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/asym_nmos_idvg0_allsw0_T27.cir ${CMAKE_CURRENT_BINARY_DIR}/asym_nmos_idvg0_allsw0_T27.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/asym_nmos_idvg0_allsw0_T27.cir.res.gs ${CMAKE_CURRENT_BINARY_DIR}/asym_nmos_idvg0_allsw0_T27.cir.res.gs ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/asym_pmos_idvg0_allsw0_T27.cir ${CMAKE_CURRENT_BINARY_DIR}/asym_pmos_idvg0_allsw0_T27.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/asym_pmos_idvg0_allsw0_T27.cir.res.gs ${CMAKE_CURRENT_BINARY_DIR}/asym_pmos_idvg0_allsw0_T27.cir.res.gs ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/sym_nmos_idvg0_allsw0_T27.cir ${CMAKE_CURRENT_BINARY_DIR}/sym_nmos_idvg0_allsw0_T27.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/sym_nmos_idvg0_allsw0_T27.cir.res.gs ${CMAKE_CURRENT_BINARY_DIR}/sym_nmos_idvg0_allsw0_T27.cir.res.gs ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/tags ${CMAKE_CURRENT_BINARY_DIR}/tags ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/sym_pmos_idvg0_allsw0_T27.cir ${CMAKE_CURRENT_BINARY_DIR}/sym_pmos_idvg0_allsw0_T27.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/sym_pmos_idvg0_allsw0_T27.cir.res.gs ${CMAKE_CURRENT_BINARY_DIR}/sym_pmos_idvg0_allsw0_T27.cir.res.gs ONLY_IF_DIFFERENT)
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir COMMAND $<TARGET_FILE:Xyce> asym_nmos_idvg0_allsw0_T27.cir )
  set_property(TEST ${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir PROPERTY LABELS "serial;parallel;nightly;lutsoi")
  set_tests_properties(${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir PROPERTIES FIXTURES_SETUP asym_nmos_idvg0_allsw0_T27.cir)
  add_test(NAME ${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir.verify COMMAND ${XYCE_VERIFY} asym_nmos_idvg0_allsw0_T27.cir ${OutputDataDir}/L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir.prn asym_nmos_idvg0_allsw0_T27.cir.prn )
  set_tests_properties(${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir.verify PROPERTIES FIXTURES_REQUIRED asym_nmos_idvg0_allsw0_T27.cir)
  set_property(TEST ${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir.verify PROPERTY LABELS "serial;parallel;nightly;lutsoi")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> asym_nmos_idvg0_allsw0_T27.cir )
  set_property(TEST ${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir PROPERTY LABELS "serial;parallel;nightly;lutsoi")
  set_tests_properties(${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir PROPERTIES FIXTURES_SETUP asym_nmos_idvg0_allsw0_T27.cir)
  add_test(NAME ${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir.verify COMMAND ${XYCE_VERIFY} asym_nmos_idvg0_allsw0_T27.cir ${OutputDataDir}/L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir.prn asym_nmos_idvg0_allsw0_T27.cir.prn )
  set_tests_properties(${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir.verify PROPERTIES FIXTURES_REQUIRED asym_nmos_idvg0_allsw0_T27.cir)
  set_property(TEST ${TestNamePrefix}L_UTSOI/asym_nmos_idvg0_allsw0_T27.cir.verify PROPERTY LABELS "serial;parallel;nightly;lutsoi")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir COMMAND $<TARGET_FILE:Xyce> asym_pmos_idvg0_allsw0_T27.cir )
  set_property(TEST ${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir PROPERTY LABELS "serial;parallel;nightly;lutsoi")
  set_tests_properties(${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir PROPERTIES FIXTURES_SETUP asym_pmos_idvg0_allsw0_T27.cir)
  add_test(NAME ${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir.verify COMMAND ${XYCE_VERIFY} asym_pmos_idvg0_allsw0_T27.cir ${OutputDataDir}/L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir.prn asym_pmos_idvg0_allsw0_T27.cir.prn )
  set_tests_properties(${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir.verify PROPERTIES FIXTURES_REQUIRED asym_pmos_idvg0_allsw0_T27.cir)
  set_property(TEST ${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir.verify PROPERTY LABELS "serial;parallel;nightly;lutsoi")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> asym_pmos_idvg0_allsw0_T27.cir )
  set_property(TEST ${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir PROPERTY LABELS "serial;parallel;nightly;lutsoi")
  set_tests_properties(${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir PROPERTIES FIXTURES_SETUP asym_pmos_idvg0_allsw0_T27.cir)
  add_test(NAME ${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir.verify COMMAND ${XYCE_VERIFY} asym_pmos_idvg0_allsw0_T27.cir ${OutputDataDir}/L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir.prn asym_pmos_idvg0_allsw0_T27.cir.prn )
  set_tests_properties(${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir.verify PROPERTIES FIXTURES_REQUIRED asym_pmos_idvg0_allsw0_T27.cir)
  set_property(TEST ${TestNamePrefix}L_UTSOI/asym_pmos_idvg0_allsw0_T27.cir.verify PROPERTY LABELS "serial;parallel;nightly;lutsoi")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir COMMAND $<TARGET_FILE:Xyce> sym_nmos_idvg0_allsw0_T27.cir )
  set_property(TEST ${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir PROPERTY LABELS "serial;parallel;nightly;lutsoi")
  set_tests_properties(${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir PROPERTIES FIXTURES_SETUP sym_nmos_idvg0_allsw0_T27.cir)
  add_test(NAME ${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir.verify COMMAND ${XYCE_VERIFY} sym_nmos_idvg0_allsw0_T27.cir ${OutputDataDir}/L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir.prn sym_nmos_idvg0_allsw0_T27.cir.prn )
  set_tests_properties(${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir.verify PROPERTIES FIXTURES_REQUIRED sym_nmos_idvg0_allsw0_T27.cir)
  set_property(TEST ${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir.verify PROPERTY LABELS "serial;parallel;nightly;lutsoi")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> sym_nmos_idvg0_allsw0_T27.cir )
  set_property(TEST ${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir PROPERTY LABELS "serial;parallel;nightly;lutsoi")
  set_tests_properties(${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir PROPERTIES FIXTURES_SETUP sym_nmos_idvg0_allsw0_T27.cir)
  add_test(NAME ${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir.verify COMMAND ${XYCE_VERIFY} sym_nmos_idvg0_allsw0_T27.cir ${OutputDataDir}/L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir.prn sym_nmos_idvg0_allsw0_T27.cir.prn )
  set_tests_properties(${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir.verify PROPERTIES FIXTURES_REQUIRED sym_nmos_idvg0_allsw0_T27.cir)
  set_property(TEST ${TestNamePrefix}L_UTSOI/sym_nmos_idvg0_allsw0_T27.cir.verify PROPERTY LABELS "serial;parallel;nightly;lutsoi")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir COMMAND $<TARGET_FILE:Xyce> sym_pmos_idvg0_allsw0_T27.cir )
  set_property(TEST ${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir PROPERTY LABELS "serial;parallel;nightly;lutsoi")
  set_tests_properties(${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir PROPERTIES FIXTURES_SETUP sym_pmos_idvg0_allsw0_T27.cir)
  add_test(NAME ${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir.verify COMMAND ${XYCE_VERIFY} sym_pmos_idvg0_allsw0_T27.cir ${OutputDataDir}/L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir.prn sym_pmos_idvg0_allsw0_T27.cir.prn )
  set_tests_properties(${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir.verify PROPERTIES FIXTURES_REQUIRED sym_pmos_idvg0_allsw0_T27.cir)
  set_property(TEST ${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir.verify PROPERTY LABELS "serial;parallel;nightly;lutsoi")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> sym_pmos_idvg0_allsw0_T27.cir )
  set_property(TEST ${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir PROPERTY LABELS "serial;parallel;nightly;lutsoi")
  set_tests_properties(${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir PROPERTIES FIXTURES_SETUP sym_pmos_idvg0_allsw0_T27.cir)
  add_test(NAME ${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir.verify COMMAND ${XYCE_VERIFY} sym_pmos_idvg0_allsw0_T27.cir ${OutputDataDir}/L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir.prn sym_pmos_idvg0_allsw0_T27.cir.prn )
  set_tests_properties(${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir.verify PROPERTIES FIXTURES_REQUIRED sym_pmos_idvg0_allsw0_T27.cir)
  set_property(TEST ${TestNamePrefix}L_UTSOI/sym_pmos_idvg0_allsw0_T27.cir.verify PROPERTY LABELS "serial;parallel;nightly;lutsoi")
endif()
