# This file is generated by the script SetUpCtestFiles.py
# If possible, modify the script to fix any issues with the CMakeLists.txt files
# Or you can remove this header line to prevent this file from being overwritten

file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/README ${CMAKE_CURRENT_BINARY_DIR}/README ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/rlc_tranline.cir ${CMAKE_CURRENT_BINARY_DIR}/rlc_tranline.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/rlc_tranline.cir.sh ${CMAKE_CURRENT_BINARY_DIR}/rlc_tranline.cir.sh ONLY_IF_DIFFERENT)
file(CHMOD ${CMAKE_CURRENT_BINARY_DIR}/rlc_tranline.cir.sh PERMISSIONS OWNER_READ OWNER_WRITE OWNER_EXECUTE GROUP_READ GROUP_EXECUTE WORLD_READ WORLD_EXECUTE)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/tags ${CMAKE_CURRENT_BINARY_DIR}/tags ONLY_IF_DIFFERENT)
if( Xyce_PARALLEL_MPI  AND BASH_FOUND )
  add_test(NAME ${TestNamePrefix}BUG_1301/rlc_tranline.cir.sh COMMAND bash rlc_tranline.cir.sh "mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce>" ${XYCE_VERIFY} ${XYCE_VERIFY} rlc_tranline.cir ${OutputDataDir}/BUG_1301/rlc_tranline.cir.prn )
  set_property(TEST ${TestNamePrefix}BUG_1301/rlc_tranline.cir.sh PROPERTY LABELS "nightly;required:parallel;resistor;capacitor;inductor")
endif()
