# This file is generated by the script SetUpCtestFiles.py
# If possible, modify the script to fix any issues with the CMakeLists.txt files
# Or you can remove this header line to prevent this file from being overwritten

file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/b3soiTranDefaults.cir ${CMAKE_CURRENT_BINARY_DIR}/b3soiTranDefaults.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/dcSweep.cir ${CMAKE_CURRENT_BINARY_DIR}/dcSweep.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/dcSweep.cir.tags ${CMAKE_CURRENT_BINARY_DIR}/dcSweep.cir.tags ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/b3soiTranDefaultsNoVoltLim.cir ${CMAKE_CURRENT_BINARY_DIR}/b3soiTranDefaultsNoVoltLim.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/dcSweepNoVoltLim.cir ${CMAKE_CURRENT_BINARY_DIR}/dcSweepNoVoltLim.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/b3soiTranDefaultsNoGminScaling.cir ${CMAKE_CURRENT_BINARY_DIR}/b3soiTranDefaultsNoGminScaling.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/dcSweepNoGminScaling.cir ${CMAKE_CURRENT_BINARY_DIR}/dcSweepNoGminScaling.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/tags ${CMAKE_CURRENT_BINARY_DIR}/tags ONLY_IF_DIFFERENT)
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir COMMAND $<TARGET_FILE:Xyce> b3soiTranDefaults.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir PROPERTIES FIXTURES_SETUP b3soiTranDefaults.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir.verify COMMAND ${XYCE_VERIFY} b3soiTranDefaults.cir ${OutputDataDir}/BSIMSOI3/b3soiTranDefaults.cir.prn b3soiTranDefaults.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir.verify PROPERTIES FIXTURES_REQUIRED b3soiTranDefaults.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> b3soiTranDefaults.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir PROPERTIES FIXTURES_SETUP b3soiTranDefaults.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir.verify COMMAND ${XYCE_VERIFY} b3soiTranDefaults.cir ${OutputDataDir}/BSIMSOI3/b3soiTranDefaults.cir.prn b3soiTranDefaults.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir.verify PROPERTIES FIXTURES_REQUIRED b3soiTranDefaults.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaults.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir COMMAND $<TARGET_FILE:Xyce> b3soiTranDefaultsNoGminScaling.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir PROPERTIES FIXTURES_SETUP b3soiTranDefaultsNoGminScaling.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir.verify COMMAND ${XYCE_VERIFY} b3soiTranDefaultsNoGminScaling.cir ${OutputDataDir}/BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir.prn b3soiTranDefaultsNoGminScaling.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir.verify PROPERTIES FIXTURES_REQUIRED b3soiTranDefaultsNoGminScaling.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> b3soiTranDefaultsNoGminScaling.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir PROPERTIES FIXTURES_SETUP b3soiTranDefaultsNoGminScaling.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir.verify COMMAND ${XYCE_VERIFY} b3soiTranDefaultsNoGminScaling.cir ${OutputDataDir}/BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir.prn b3soiTranDefaultsNoGminScaling.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir.verify PROPERTIES FIXTURES_REQUIRED b3soiTranDefaultsNoGminScaling.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoGminScaling.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir COMMAND $<TARGET_FILE:Xyce> b3soiTranDefaultsNoVoltLim.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir PROPERTIES FIXTURES_SETUP b3soiTranDefaultsNoVoltLim.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir.verify COMMAND ${XYCE_VERIFY} b3soiTranDefaultsNoVoltLim.cir ${OutputDataDir}/BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir.prn b3soiTranDefaultsNoVoltLim.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir.verify PROPERTIES FIXTURES_REQUIRED b3soiTranDefaultsNoVoltLim.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> b3soiTranDefaultsNoVoltLim.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir PROPERTIES FIXTURES_SETUP b3soiTranDefaultsNoVoltLim.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir.verify COMMAND ${XYCE_VERIFY} b3soiTranDefaultsNoVoltLim.cir ${OutputDataDir}/BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir.prn b3soiTranDefaultsNoVoltLim.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir.verify PROPERTIES FIXTURES_REQUIRED b3soiTranDefaultsNoVoltLim.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/b3soiTranDefaultsNoVoltLim.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweep.cir COMMAND $<TARGET_FILE:Xyce> dcSweep.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweep.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;bug414")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweep.cir PROPERTIES FIXTURES_SETUP dcSweep.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweep.cir.verify COMMAND ${XYCE_VERIFY} dcSweep.cir ${OutputDataDir}/BSIMSOI3/dcSweep.cir.prn dcSweep.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweep.cir.verify PROPERTIES FIXTURES_REQUIRED dcSweep.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweep.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;bug414")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweep.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> dcSweep.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweep.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;bug414")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweep.cir PROPERTIES FIXTURES_SETUP dcSweep.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweep.cir.verify COMMAND ${XYCE_VERIFY} dcSweep.cir ${OutputDataDir}/BSIMSOI3/dcSweep.cir.prn dcSweep.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweep.cir.verify PROPERTIES FIXTURES_REQUIRED dcSweep.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweep.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;bug414")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir COMMAND $<TARGET_FILE:Xyce> dcSweepNoGminScaling.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir PROPERTIES FIXTURES_SETUP dcSweepNoGminScaling.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir.verify COMMAND ${XYCE_VERIFY} dcSweepNoGminScaling.cir ${OutputDataDir}/BSIMSOI3/dcSweepNoGminScaling.cir.prn dcSweepNoGminScaling.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir.verify PROPERTIES FIXTURES_REQUIRED dcSweepNoGminScaling.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> dcSweepNoGminScaling.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir PROPERTIES FIXTURES_SETUP dcSweepNoGminScaling.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir.verify COMMAND ${XYCE_VERIFY} dcSweepNoGminScaling.cir ${OutputDataDir}/BSIMSOI3/dcSweepNoGminScaling.cir.prn dcSweepNoGminScaling.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir.verify PROPERTIES FIXTURES_REQUIRED dcSweepNoGminScaling.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweepNoGminScaling.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir COMMAND $<TARGET_FILE:Xyce> dcSweepNoVoltLim.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir PROPERTIES FIXTURES_SETUP dcSweepNoVoltLim.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir.verify COMMAND ${XYCE_VERIFY} dcSweepNoVoltLim.cir ${OutputDataDir}/BSIMSOI3/dcSweepNoVoltLim.cir.prn dcSweepNoVoltLim.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir.verify PROPERTIES FIXTURES_REQUIRED dcSweepNoVoltLim.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> dcSweepNoVoltLim.cir )
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir PROPERTIES FIXTURES_SETUP dcSweepNoVoltLim.cir)
  add_test(NAME ${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir.verify COMMAND ${XYCE_VERIFY} dcSweepNoVoltLim.cir ${OutputDataDir}/BSIMSOI3/dcSweepNoVoltLim.cir.prn dcSweepNoVoltLim.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir.verify PROPERTIES FIXTURES_REQUIRED dcSweepNoVoltLim.cir)
  set_property(TEST ${TestNamePrefix}BSIMSOI3/dcSweepNoVoltLim.cir.verify PROPERTY LABELS "serial;parallel;nightly;b3soi;mos10;resistor;vsin")
endif()
