# This file is generated by the script SetUpCtestFiles.py
# If possible, modify the script to fix any issues with the CMakeLists.txt files
# Or you can remove this header line to prevent this file from being overwritten

file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/bsim6_nmos_outvars.cir ${CMAKE_CURRENT_BINARY_DIR}/bsim6_nmos_outvars.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/bsim6_pmos_outvars.cir ${CMAKE_CURRENT_BINARY_DIR}/bsim6_pmos_outvars.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/gummel_nmos_xyce.cir ${CMAKE_CURRENT_BINARY_DIR}/gummel_nmos_xyce.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/gummel_pmos_xyce.cir ${CMAKE_CURRENT_BINARY_DIR}/gummel_pmos_xyce.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/idvd_nmos_xyce.cir ${CMAKE_CURRENT_BINARY_DIR}/idvd_nmos_xyce.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/idvd_pmos_xyce.cir ${CMAKE_CURRENT_BINARY_DIR}/idvd_pmos_xyce.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/idvg_nmos_xyce.cir ${CMAKE_CURRENT_BINARY_DIR}/idvg_nmos_xyce.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/idvg_pmos_xyce.cir ${CMAKE_CURRENT_BINARY_DIR}/idvg_pmos_xyce.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/modelcard_xyce.nmos ${CMAKE_CURRENT_BINARY_DIR}/modelcard_xyce.nmos ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/modelcard_xyce.pmos ${CMAKE_CURRENT_BINARY_DIR}/modelcard_xyce.pmos ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/ringosc_17_xyce.cir ${CMAKE_CURRENT_BINARY_DIR}/ringosc_17_xyce.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/ringosc_17_xyce.cir.sh ${CMAKE_CURRENT_BINARY_DIR}/ringosc_17_xyce.cir.sh ONLY_IF_DIFFERENT)
file(CHMOD ${CMAKE_CURRENT_BINARY_DIR}/ringosc_17_xyce.cir.sh PERMISSIONS OWNER_READ OWNER_WRITE OWNER_EXECUTE GROUP_READ GROUP_EXECUTE WORLD_READ WORLD_EXECUTE)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/ringosc_17_xyce.cir.tags ${CMAKE_CURRENT_BINARY_DIR}/ringosc_17_xyce.cir.tags ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/tags ${CMAKE_CURRENT_BINARY_DIR}/tags ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/inverter_transient_xyce.cir ${CMAKE_CURRENT_BINARY_DIR}/inverter_transient_xyce.cir ONLY_IF_DIFFERENT)
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir COMMAND $<TARGET_FILE:Xyce> bsim6_nmos_outvars.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir PROPERTIES FIXTURES_SETUP bsim6_nmos_outvars.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir.verify COMMAND ${XYCE_VERIFY} bsim6_nmos_outvars.cir ${OutputDataDir}/BSIM6/bsim6_nmos_outvars.cir.prn bsim6_nmos_outvars.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir.verify PROPERTIES FIXTURES_REQUIRED bsim6_nmos_outvars.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> bsim6_nmos_outvars.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir PROPERTIES FIXTURES_SETUP bsim6_nmos_outvars.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir.verify COMMAND ${XYCE_VERIFY} bsim6_nmos_outvars.cir ${OutputDataDir}/BSIM6/bsim6_nmos_outvars.cir.prn bsim6_nmos_outvars.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir.verify PROPERTIES FIXTURES_REQUIRED bsim6_nmos_outvars.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/bsim6_nmos_outvars.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir COMMAND $<TARGET_FILE:Xyce> bsim6_pmos_outvars.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir PROPERTIES FIXTURES_SETUP bsim6_pmos_outvars.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir.verify COMMAND ${XYCE_VERIFY} bsim6_pmos_outvars.cir ${OutputDataDir}/BSIM6/bsim6_pmos_outvars.cir.prn bsim6_pmos_outvars.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir.verify PROPERTIES FIXTURES_REQUIRED bsim6_pmos_outvars.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> bsim6_pmos_outvars.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir PROPERTIES FIXTURES_SETUP bsim6_pmos_outvars.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir.verify COMMAND ${XYCE_VERIFY} bsim6_pmos_outvars.cir ${OutputDataDir}/BSIM6/bsim6_pmos_outvars.cir.prn bsim6_pmos_outvars.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir.verify PROPERTIES FIXTURES_REQUIRED bsim6_pmos_outvars.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/bsim6_pmos_outvars.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir COMMAND $<TARGET_FILE:Xyce> gummel_nmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir PROPERTIES FIXTURES_SETUP gummel_nmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} gummel_nmos_xyce.cir ${OutputDataDir}/BSIM6/gummel_nmos_xyce.cir.prn gummel_nmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED gummel_nmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> gummel_nmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir PROPERTIES FIXTURES_SETUP gummel_nmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} gummel_nmos_xyce.cir ${OutputDataDir}/BSIM6/gummel_nmos_xyce.cir.prn gummel_nmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED gummel_nmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/gummel_nmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir COMMAND $<TARGET_FILE:Xyce> gummel_pmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir PROPERTIES FIXTURES_SETUP gummel_pmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} gummel_pmos_xyce.cir ${OutputDataDir}/BSIM6/gummel_pmos_xyce.cir.prn gummel_pmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED gummel_pmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> gummel_pmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir PROPERTIES FIXTURES_SETUP gummel_pmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} gummel_pmos_xyce.cir ${OutputDataDir}/BSIM6/gummel_pmos_xyce.cir.prn gummel_pmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED gummel_pmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/gummel_pmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir COMMAND $<TARGET_FILE:Xyce> idvd_nmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir PROPERTIES FIXTURES_SETUP idvd_nmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} idvd_nmos_xyce.cir ${OutputDataDir}/BSIM6/idvd_nmos_xyce.cir.prn idvd_nmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED idvd_nmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> idvd_nmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir PROPERTIES FIXTURES_SETUP idvd_nmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} idvd_nmos_xyce.cir ${OutputDataDir}/BSIM6/idvd_nmos_xyce.cir.prn idvd_nmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED idvd_nmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/idvd_nmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir COMMAND $<TARGET_FILE:Xyce> idvd_pmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir PROPERTIES FIXTURES_SETUP idvd_pmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} idvd_pmos_xyce.cir ${OutputDataDir}/BSIM6/idvd_pmos_xyce.cir.prn idvd_pmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED idvd_pmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> idvd_pmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir PROPERTIES FIXTURES_SETUP idvd_pmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} idvd_pmos_xyce.cir ${OutputDataDir}/BSIM6/idvd_pmos_xyce.cir.prn idvd_pmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED idvd_pmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/idvd_pmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir COMMAND $<TARGET_FILE:Xyce> idvg_nmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir PROPERTIES FIXTURES_SETUP idvg_nmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} idvg_nmos_xyce.cir ${OutputDataDir}/BSIM6/idvg_nmos_xyce.cir.prn idvg_nmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED idvg_nmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> idvg_nmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir PROPERTIES FIXTURES_SETUP idvg_nmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} idvg_nmos_xyce.cir ${OutputDataDir}/BSIM6/idvg_nmos_xyce.cir.prn idvg_nmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED idvg_nmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/idvg_nmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir COMMAND $<TARGET_FILE:Xyce> idvg_pmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir PROPERTIES FIXTURES_SETUP idvg_pmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} idvg_pmos_xyce.cir ${OutputDataDir}/BSIM6/idvg_pmos_xyce.cir.prn idvg_pmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED idvg_pmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> idvg_pmos_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir PROPERTIES FIXTURES_SETUP idvg_pmos_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir.verify COMMAND ${XYCE_VERIFY} idvg_pmos_xyce.cir ${OutputDataDir}/BSIM6/idvg_pmos_xyce.cir.prn idvg_pmos_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED idvg_pmos_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/idvg_pmos_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}BSIM6/inverter_transient_xyce.cir COMMAND $<TARGET_FILE:Xyce> inverter_transient_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/inverter_transient_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/inverter_transient_xyce.cir PROPERTIES FIXTURES_SETUP inverter_transient_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/inverter_transient_xyce.cir.verify COMMAND ${XYCE_VERIFY} inverter_transient_xyce.cir ${OutputDataDir}/BSIM6/inverter_transient_xyce.cir.prn inverter_transient_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/inverter_transient_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED inverter_transient_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/inverter_transient_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}BSIM6/inverter_transient_xyce.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> inverter_transient_xyce.cir )
  set_property(TEST ${TestNamePrefix}BSIM6/inverter_transient_xyce.cir PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
  set_tests_properties(${TestNamePrefix}BSIM6/inverter_transient_xyce.cir PROPERTIES FIXTURES_SETUP inverter_transient_xyce.cir)
  add_test(NAME ${TestNamePrefix}BSIM6/inverter_transient_xyce.cir.verify COMMAND ${XYCE_VERIFY} inverter_transient_xyce.cir ${OutputDataDir}/BSIM6/inverter_transient_xyce.cir.prn inverter_transient_xyce.cir.prn )
  set_tests_properties(${TestNamePrefix}BSIM6/inverter_transient_xyce.cir.verify PROPERTIES FIXTURES_REQUIRED inverter_transient_xyce.cir)
  set_property(TEST ${TestNamePrefix}BSIM6/inverter_transient_xyce.cir.verify PROPERTY LABELS "serial;parallel;nightly;mos77;bsim6;adms;valgrind")
endif()
if( (NOT Xyce_PARALLEL_MPI) AND PERL_FOUND )
  add_test(NAME ${TestNamePrefix}BSIM6/ringosc_17_xyce.cir.sh COMMAND perl -I${XyceRegressionTestScripts} ringosc_17_xyce.cir.sh $<TARGET_FILE:Xyce> ${XYCE_VERIFY} ${XYCE_VERIFY} ringosc_17_xyce.cir ${OutputDataDir}/BSIM6/ringosc_17_xyce.cir.prn )
  set_property(TEST ${TestNamePrefix}BSIM6/ringosc_17_xyce.cir.sh PROPERTY LABELS "serial;parallel;weekly;bsim6;mos77;adms")
endif()
if( Xyce_PARALLEL_MPI  AND PERL_FOUND )
  add_test(NAME ${TestNamePrefix}BSIM6/ringosc_17_xyce.cir.sh COMMAND perl -I${XyceRegressionTestScripts} ringosc_17_xyce.cir.sh "mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce>" ${XYCE_VERIFY} ${XYCE_VERIFY} ringosc_17_xyce.cir ${OutputDataDir}/BSIM6/ringosc_17_xyce.cir.prn )
  set_property(TEST ${TestNamePrefix}BSIM6/ringosc_17_xyce.cir.sh PROPERTY LABELS "serial;parallel;weekly;bsim6;mos77;adms")
endif()
