# This file is generated by the script SetUpCtestFiles.py
# If possible, modify the script to fix any issues with the CMakeLists.txt files
# Or you can remove this header line to prevent this file from being overwritten

file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/log.cir ${CMAKE_CURRENT_BINARY_DIR}/log.cir ONLY_IF_DIFFERENT)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/log.cir.prn.gs.pl ${CMAKE_CURRENT_BINARY_DIR}/log.cir.prn.gs.pl ONLY_IF_DIFFERENT)
file(CHMOD ${CMAKE_CURRENT_BINARY_DIR}/log.cir.prn.gs.pl PERMISSIONS OWNER_READ OWNER_WRITE OWNER_EXECUTE GROUP_READ GROUP_EXECUTE WORLD_READ WORLD_EXECUTE)
file(COPY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/tags ${CMAKE_CURRENT_BINARY_DIR}/tags ONLY_IF_DIFFERENT)
if( (NOT Xyce_PARALLEL_MPI) )
  add_test(NAME ${TestNamePrefix}ABM_LOG/log.cir COMMAND $<TARGET_FILE:Xyce> log.cir )
  set_property(TEST ${TestNamePrefix}ABM_LOG/log.cir PROPERTY LABELS "serial;nightly;parallel;valgrind;bsrc;expression;transient;vpwl;resistor")
  set_tests_properties(${TestNamePrefix}ABM_LOG/log.cir PROPERTIES FIXTURES_SETUP log.cir)
  add_test(NAME ${TestNamePrefix}ABM_LOG/log.cir.gen_gs COMMAND perl log.cir.prn.gs.pl log.cir.prn)
  set_tests_properties(${TestNamePrefix}ABM_LOG/log.cir.gen_gs PROPERTIES FIXTURES_REQUIRED log.cir)
set_tests_properties(${TestNamePrefix}ABM_LOG/log.cir.gen_gs PROPERTIES FIXTURES_SETUP log.cir.gs)
  set_property(TEST ${TestNamePrefix}ABM_LOG/log.cir.gen_gs PROPERTY LABELS "serial;nightly;parallel;valgrind;bsrc;expression;transient;vpwl;resistor")
  add_test(NAME ${TestNamePrefix}ABM_LOG/log.cir.verify COMMAND ${XYCE_VERIFY} log.cir log.cir.prn.gs log.cir.prn )
  set_tests_properties(${TestNamePrefix}ABM_LOG/log.cir.verify PROPERTIES FIXTURES_REQUIRED log.cir.gs)
  set_property(TEST ${TestNamePrefix}ABM_LOG/log.cir.verify PROPERTY LABELS "serial;nightly;parallel;valgrind;bsrc;expression;transient;vpwl;resistor")
endif()
if( Xyce_PARALLEL_MPI  )
  add_test(NAME ${TestNamePrefix}ABM_LOG/log.cir COMMAND mpiexec -bind-to none -np 2 $<TARGET_FILE:Xyce> log.cir )
  set_property(TEST ${TestNamePrefix}ABM_LOG/log.cir PROPERTY LABELS "serial;nightly;parallel;valgrind;bsrc;expression;transient;vpwl;resistor")
  set_tests_properties(${TestNamePrefix}ABM_LOG/log.cir PROPERTIES FIXTURES_SETUP log.cir)
add_test(NAME ${TestNamePrefix}ABM_LOG/log.cir.gen_gs COMMAND perl log.cir.prn.gs.pl log.cir.prn)
set_tests_properties(${TestNamePrefix}ABM_LOG/log.cir.gen_gs PROPERTIES FIXTURES_REQUIRED log.cir)
set_tests_properties(${TestNamePrefix}ABM_LOG/log.cir.gen_gs PROPERTIES FIXTURES_SETUP log.cir.gs)
  set_property(TEST ${TestNamePrefix}ABM_LOG/log.cir.gen_gs PROPERTY LABELS "serial;nightly;parallel;valgrind;bsrc;expression;transient;vpwl;resistor")
add_test(NAME ${TestNamePrefix}ABM_LOG/log.cir.verify COMMAND ${XYCE_VERIFY} log.cir log.cir.prn.gs log.cir.prn )
set_tests_properties(${TestNamePrefix}ABM_LOG/log.cir.verify PROPERTIES FIXTURES_REQUIRED log.cir.gs)
  set_property(TEST ${TestNamePrefix}ABM_LOG/log.cir.verify PROPERTY LABELS "serial;nightly;parallel;valgrind;bsrc;expression;transient;vpwl;resistor")
endif()
