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Xyce
4.0
[Released
May 21st, 2007]
The
focus of the 4.0 release has been to dramatically
improve and expand the time integration capability
of Xyce.
New
Xyce features include:
-
New variable-order, variable-stepsize new time integration
package for improved accuracy and efficiency. This
is now the default integrator
- Initial
implementation of multi-time partial differential
equation (MPDE) time integration capability
- Reduced
device model package memory footprint
- Trilinos
7.0 solver library
- Complete
rewrite of the nonlinear core and linear mutual
inductor models. These rewrites have resulted in
a very significant speedup (up to 5x) of mutual
inductor circuits
- Interpolated
output; now .OPTIONS OUTPUT output_interval will
output precisely at the user-requested time points
- DCOP
restart
For
more information, please read the 4.0 release notes
(coming soon) or click here
for download information.
Xyce
3.1
[Released May 24th, 2006]
The 3.1 release of Xyce contains many new features,
bug fixes and performance enhancements. Please see
the release
notes for a complete list.
New
Xyce features include:
-
Two-Level nonlinear solves, which make it possible
to simulate power-node parasitics in very large
(parallel) problems
- New
Device models:
- Level
20 MOSFET (VDMOS) with photocurrent effects
- Level
2 diode with PSPICE enhancements for Zener diodes.
- Level
5 BJT model, which includes an empirical neutron
effects model and a photocurrent model.
-
Quadratic temperature compensation for the JFET,
MESFET, VDMOS, BJT and B3SOI devices.
- Several
new homotopy options, including multi-parameter
homotopy, GMIN stepping and pseudo-transient stepping.
For
more information, please read the 3.1
release notes
or click here for download
information.
Xyce
3.0.1
[Released December 21, 2005]
The
HPEMS / Xyce release of Xyce 3.0.1 is an update to
Xyce Version 3.0, which was released in September.
Several enhancements and bug fixes have been added
to this release, including:
-
Enhanced homotopy, including the ability to simultaneously
use voltage limiting and homotopy algorithms.
- Additional
roll-off parameter (NK) in BJT for improved PSPICE
compatibility
- Improved
error condition handling.
- Parser
bug fixes.
For
more information, please read the 3.0.1
release notes
or click here regarding
download information.
Xyce
3.0
[Released September 20, 2005]
This
release of Xyce™
contains many new features, bug fixes and performance
enhancements. Please see the release
notes for a complete list.
New
Xyce features include:
-
Stability enhancements to the prompt photocurrent
models and additional photocurrent models.
- Enhanced
MOSFET-based homotopy algorithms for DCOP solution.
- New
device models:
- BSIMSOI
- PN
junction photocurrent source
- JFET
Level 2
- MESFET
- generic
switch
- More
advanced temperature compensation for the following
device models:
- JFET
- MESFET
- capacitor
- inductor
- Improved
numerical stability in the level-1 JFET and VDMOS
devices.
-
Improved parser scalability, and error reporting.
-
Updated Trilinos solver library.
-
New, variable-order, variable stepsize time integrator
(optional).
-
Support for linking Xyce to IC-CAP parameter extraction
software
-
Support for random numbers in expressions via the
RAND() function.
For
more information, please read the 3.0
release notes
or click here regarding
download information.
Xyce
2.1
[Released
February 2, 2005]
This
release is the first full release following the Version
2.0 release. As in previous releases, it encompasses
many key bug fixes and new features, as well as robustness
and performance enhancements. Highlights for this
release are listed below.
-
Improved parser scalability, achieved with a new
distributed parser
-
Updated to Trilinos solver library, version 4.0
-
New circuit-specific sparse direct solver, KLU.
- Stability
enhancements to the prompt photocurrent models.
-
Improved support for .STEP and .DC analysis, to
include logarithmic sweeps.
-
New device models: JFET, neutron aware BJT, VDMOS,
photocurrent aware VDMOS.
-
Enhanced MOSFET-based homotopy algorithms for DCOP
solution.
-
More extensive support for TCAD devices.
For
more information, please read the release
notes or visit the User
Resources page.
Click
here for the Xyce
Release 2.1 Notes
Xyce
2.0
[Released December 22, 2003]
This
release is the first full release following the Version
1.1 release. As in previous releases, it encompasses
many key bug fixes and new features, as well as robustness
and performance enhancements. Highlights for this
release are listed below. For details of each of these
new features, see the Xyce
Users' Guide, and the Xyce
Reference Guide.
-
Improved parser performance.
- More
extensive support for PDE devices.
- Stability
enhancements to the prompt photocurrent models.
- The
NOX nonlinear solver as the default nonlinear solver.
- Support
for homotopy algorithms with NOX/LOCA. In particular,
these algorithms are very useful for solving large
MOSFET circuits.
- New
support for .STEP analysis.
- Improved
compatibility with other circuit simulators (PSpice,
ChileSPICE).
For
more information, please read the release
notes or visit the User
Resources page.
Click
here for the lastest Xyce
Release Notes
Xyce
1.1
[Released June 26, 2003]
This
release is the first full release following the Version
1.0 release. It encompasses many key bug fixes as
well as key robustness and performance enhancements.
Furthermore, many features that we previously provided
as options have now been thoroughly tested and are
now defaults (e.g., direct-matrix access for improved
performance). Lastly, several new features continue
to move Xyce towards a more full-featured
circuit simulation tool. Highlights for this release
are:
- Improved
performance (approximately 30% improvement) of the
sparse-direct linear solver (KSparse) for serial
calculations.
- Improved
performance (approximately 20%) of the time integration
and nonlinear solver libraries via modified solver
defaults and enhanced step-control heuristics.
- Support
for the Apple OS X operating systems (serial) in
addition to the large number of supported platforms.
- A
new default parser that provides for much improved
detection of netlist errors and warnings.
- Added
"-v" command line option that will report
the current version number being run.
- Support
for initial conditions on capacitors and inductors
using the "IC = <value>" syntax
will force the specified voltage drop at the beginning
of a transient calculation.
- Support
for new linear-solver controls (please see the updated
Xyce Parallel Electronic Simulator User's Guide
Version 1.1)
- Support
for ChileSPICE-compatible voltage- and current-controlled
sources in that the user may now specify a "VALUE={expression}"
instead of being limited to linear coefficients.
- Support
for netlist inline comments.
Sandia
Lab News
2003
Lab's Accomplishments
Xyce
1.0
This
release marks the first official release of Sandia's
Xyce Parallel Electronic Simulator. Version
1.0 is a release that has obtained enough capability,
stability and performance to be competitive with and,
in some areas, outperform existing circuit simulation
tools available from a variety of venues.
Since
the last beta release, a myriad of enhancements and
bug fixes have been made. These include changes to
a new set of defaults for improved performance, new
devices and improved user interactivity. Highlights
for this release are:
- New
default sparse-direct linear solver (KSparse) for
improved performance on small circuits.
- Radiation
(prompt photocurrent) aware diode model.
- Support
for Sun Microsystems Solaris systems (serial)
in addition to the large number of supported platforms.
- XML
metadata-based parser that allows for better integration
with external tools by providing a common source
for device data and parameters.
- New
install and running scripts that install the Xyce
executable, documentation and supporting XML files
in appropriate locations. Additionally, Xyce is
now run using a script that sets the run-time environment.
Furthermore, the parallel version uses such scripts
to wrap the MPI calls for the appropriate installation.
- Addition
of Lambert-W function as an option for diode and
bipolar transistor devices. When this option is
enabled, Lambert-W functions are used in place of
exponential functions. Generally, this results in
greater numerical robustness for notoriously hard-to-solve
devices.
Click
here for the for Xyce
Minor Release 1.0.1 Notes
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